The procedure below is using the schematic-based design with the circuit "moj_schemat.sch". For HDL-based designs, the procedure is identical.
Create the file with stimulators for the design under test. This can be achieved in two methods:
On the left side of the screen, select Sources for: Behavioral Simulation, the select the file for simulation (it must be your testbench) and in the Processes window, start the simulation Simulate Behavioral Model:
Utworzony zostanie model do symulacji oraz otworzy się okno symulatora:
Buttons can be used for simulation control.
From the window on the left, the arbitrary signals and ports from your design can be added (make sure, that Sim Instances and Sim Objects tabs are selected). Having added a new signal, the simulation must be restarted.