Entering HDL code

With right mouse button, create a new file in the design:

In the next window select the type of the file (Verilog Module or VHDL Module) and enter its name:

or:

Next, you can specify the input and output ports. It is not obligatory here, since the ports can always be added later, during HDL code editing:

At the end, press Finish:

During e4netring HDL code, you can use the templates: