- LDV package - logical simulation and verification of digital ASIC
(Verilog-XL, NC Verilog/VHDL/SystemC, AMS Designer, Verifault-XL)
- SPR package - synthesis, Place & Route, (PKS - Physically Knowledgeable Synthesis)
- DSMSE package - place & route (Silicon Ensemble)
- SOC package - synthesis and implementation of SoC ASIC
- SEV package - extraction of parasitics, power supply analysis
(Fire&Ice, VoltageStorm, SignalStorm)
- IC package - environment for ASIC design (Composer,
Analog Artist, Virtuoso, Diva, Dracula)
- SNA package - substrate noise analysis
|
|