Netgen version 1.3
Netgen 1.3 Download
Netgen 1.3 Installation
Netgen 1.3 for Windows
Description of Version 1.3 Revisions
Using Netgen Version 1.3
Integrating Netgen With Tcl/Tk-Based Magic
Things To Do
Bug Fixes
Netgen is a tool for comparing netlists, a process known as LVS, which stands for "Layout vs. Schematic". This is an important step in the integrated circuit design flow, ensuring that the geometry that has been laid out matches the expected circuit. Very small circuits can bypass this step by confirming circuit operation through extraction and simulation. Very large digital circuits are usually generated by tools from high-level descriptions, using compilers that ensure the correct layout geometry. The greatest need for LVS is in large analog or mixed-signal circuits that cannot be simulated in reasonable time. Even for small circuits, LVS can be done much faster than simulation, and provides feedback that makes it easier to find an error than does a simulation.Netgen was developed independently of magic, written by Massimo Sivilotti, and eventually incorporated into the beginnings of the Tanner L-Edit suite of tools. However, the original code was left open source, and so I have incorporated it into the Tcl-based suite of tools including magic, IRSIM, and xcircuit.
Stable Distribution Source:Prior Releases:
File Revision Size Date netgen-1.3.4.tgz 4 (521KB) September 7, 2005
File Revision Size Date netgen-1.2.6.tgz 6 (444KB) September 30, 2003 netgen-1.1.tgz 2 (417KB) January 13, 2003
Netgen 1.3 is distribution code. Compiled normally (i.e., without the Tcl interface), it should compile and run like the original version (which had no version number). However, the "make" process has been substantially cleaned up, and converted to GNU autoconf. The Tcl version of Netgen compiles and runs by default. The Tcl version takes advantage of both the ability to script the simulation procedure, including some scripts to ease the complicated process of LVS by reducing most cases to a one-line command. The compilation procedure should be immediately recognizable to anyone familiar with GNU autoconf:
./configure make make install
Contains a binary distribution for the Cygwin package and complete instructions for installation.
Netgen revision history: Version 1.1
Netgen revision history: Version 1.2
- December 14, 2002
This is a first draft. Only a few things have been changed in this release other than the Tcl/Tk port. There is now support for capacitors, resistors, bipolars, poly-poly capacitors and resistors built with the pseudo-poly layer in magic, in the SPICE, sim, and ext format read routines. The Tcl version has a completely revamped command set, better matching the general practices of Tcl command syntax (mainly meaning commands are full words rather than single letters). In addition, the command sets for "netgen" and "netcmp" have been combined.- January 13, 2003
Massive speedup of several critical and badly-written functions; reduced from O(N^2) to O(N). The "compare" command is now virtually instantaneous. Commands "nodes" and "elements" now give more relevant information regarding specific points in the network. "sim" format retains position in the element names (for FET and FET-like elements) for convenient traceback to a layout or schematic.
Netgen revision history: Version 1.3
- March 12, 2003
Fixes the the "make config" process for Tcl/Tk compile. Also, finished implementing the Tcl "log" command for log file output, and added the script-level "lvs" command to replace the original standalone program "netcomp".- March 24, 2003
Corrections to TCL command interface.- March 26, 2003
This version was never officially released.- March 31, 2003
Changes for interoperability with magic and IRSIM.- April 3, 2003
Changes to save position information in element names for transistors read from .sim files.- September 22, 2003
Added the capability to handle "M=" syntax in SPICE files for declaring multiple transistors with equal size and connections.- September 30, 2003
Fixed an unfortunate problem with the "lvs" script command in which it implies that circuits which pass the low-level connectivity comparison match correctly. In fact, these circuits may have errors. The fix checks this condition, performs the high-level resolution of automorphisms, and reports a final pass/fail condition.
- November 15, 2004
Changed the "make" method to GNU autoconf. Revised the directory structure to put most of the Tcl-based stuff into the "tcltk" subdirectory. The source itself is essentially unchanged from version 1.2. Confirmed compile and run for both the Tcl and non-Tcl versions.- August 6, 2005
Updated parts of the "make" process to match additions to magic and xcircuit, and to address issues related to compile and install on Cygwin. Cygwin users should read the compile and install instructions on magic for Windows.- September 3, 2005
Added Xilinx support. Thanks to Peter Welch for providing the patch files. Thanks to Ingo Cyliax for the code itself, which was added to a branch of netgen at the University of Indiana, and about which I was unaware until Peter brought it to my attention. Apparently that code branch is no longer available for download from the CS department at Indiana.
Also: Changed the Makefile process to parse the file VERSION for version and revision information, not the directory name. Switched the directory to the name with the version number ("netgen-1.3.2") and the symbolic link to the package name ("netgen"). It was gently pointed out to me that I had this ass-backwards.- September 6, 2005
Added support for reading bipolar transistors from SPICE decks.- September 7, 2005
Made some changes to prevent crashing on unexpected input (in particular, undefined subcircuits) in SPICE decks. Also, added the command "readlib" for reading Actel and Xilinx libraries (formerly required use of "readnet actel|xilinx" plus an unused dummy argument, due to an error in the Tcl command-line processing). A warning is posted if an attempt is made to write a Xilinx or Actel format file without first reading the associated library.
Using Tcl-based Netgen:
The Tcl command-line commands completely replace the original command-line interface, which consisted on one-key entries in a hierarchically stacked format, difficult to use. I have removed the interface and replaced it with Tcl command-line commands plus a few scripts. These are outlined below. The original X11 interface was a complete and unnecessary disaster and has been removed. With the Tcl interface, it could presumably be rewritten in Tk, although personally, I can't see why anybody would want to.The most common use of "netgen" is to make use of its network comparison feature to compare a layout generated from magic with "extract" and "ext2sim" commands against a layout generated from a schematic (e.g., xcircuit). The command sequence in netgen to compare these two netlists is:
Arguments circuit1 and circuit2 are filenames. They do not need to have the ".sim" extension but do need to contain any directory path components (relative to the current working directory).
- readnet sim circuit1
- readnet sim circuit2
- compare circuit1 circuit2
- permute
- run converge
For circuits which do not match, it will be necessary to run the command "verify" to look at the list of illegal elements and nodes.
Note that the "verify" command produces copious output. Generally, it is preferable to use the "log" command to dump this output to a file. The command "verify only" produces just one line stating whether or not the circuits match. The output can be terminated at any time with a Control-C interrupt into either the terminal or console windows.
Starting with version 1.2, there is a script-level command which performs the sequence of commands above. This command is:
Arguments circuit1 and circuit2 are exactly as described above. logfile is the file to dump all output, and defaults to "comp.out" if not specified. Note that certain useful information, such as the initial report on the two files, and the final "yea or nay" result, is duplicated both to the log file and to the console (or terminal) window.
- lvs circuit1 circuit2 [logfile]
Standalone programs
For a long time, I did LVS by compiling netgen and using the standalone program "netcomp" for the LVS part, ignoring the rest of the "netgen" package, which largely deals with handling the loading and conversion of different netlist formats.Version 1.3 dispenses with the standalone programs, instead making the command-line interface more accessible. See the description of Tcl commands below for details.
Tcl Command-Line Interface
(A complete list of command-line commands: To be finished. For now, a dump of commands from the source code. . .)Netlist manipulation commands:
Netlist comparison commands:
- readnet [format] file
- read a netlist file (default format=auto).
- readlib format
- Initialize a library module definition, where format is either actel or xilinx. The library definitions need to be initialized prior to reading any netlist file that is to be rewritten as "writenet actel filename" or "writenet xilinx filename".
- writenet format file
- write a netlist file
- flatten cell
- flatten a hierarchical cell
- primitive cell
- declare a cell to be primitive
- nodes [element] cell
- print nodes of an element or cell
- elements [node] cell
- print elements of a node or cell
- debug on|off|command [options...]
- turn debugging on or off or debug a command
- protochip
- embed protochip structure
- instances cell
- list instances of the cell
- contents cell
- list contents of the cell
- describe cell
- describe the cell
- cells [list|all]
- print known cells
option all: print all cells, including primitives- ports cell
- print ports of the cell
- leaves [cell]
- print leaves of the cell
- quit
- exit netgen and Tcl
- reinitialize
- reintialize netgen data structures
- log [file name|start|end| reset|suspend|resume|echo]
- enable or disable output log to file named file.
- help
- print basic usage information
Scripted Tcl procedures:
- compare cell1 cell2
- declare two cells for netlist comparison
- iterate
- do one netlist compareison iteration
- summary [elements|nodes]
- summarize internal data structures
- print full report on the internal data structures
- run [converge|resolve]
- with option converge: run netlist comparison to completion (convergence)
with option resolve: run to completion and resolve automorphisms- verify [elements|nodes|only| equivalent|unique]
- verify results
- automorphisms
- print automorphisms
- equate [elements|nodes] name1 name2
- with option elements: equate two elements
with option nodes: equate two nodes- permute [pins|transistor]
- with option pins: permute pins on elements
with option transistor: enable transistor source/drain permutations- exhaustive
- toggle exhaustive subdivision
- restart
- start over (reset data structures)
- matching [element|node] name1
- return the corresponding node or element name in the compared cell
- lvs circuit1 circuit2 [logfile]
- Run the netlist comparison commands to load and compare the two netlists, leaving the bulk of the output in the file logfile (defaults to "comp.out" if unspecified), with a succinct summary printed to the terminal.
Currently, there are no specific advantages to using netgen directly under magic. It is still necessary to run the "extract" and "ext2sim" commands to generate a netlist, then run netgen's "lvs" command to compare the layout-derived netlist to a schematic-derived netlist.See the "To-Do" section for more on planned integration capabilities.
- Add capability to compare properties.
- Add capability to handle subcircuits hierarchically.
- Integrate with magic and xcircuit such that bad devices and nodes can be traced to their sources in the layout and schematic.
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Last updated: February 10, 2006 at 10:21am