HDL entry

1. Create a new project HDL file with the right mouse button:

2. In the next window, select Add or create design sources:

and select Create File:

3. In the next window, select the file type (Verilog or VHDL) and enter the file name:

4. At the end select Finish:

5. Then the input and output ports can be added:

This is not necessary, because of course we can add them at any time later when editing the HDL code.

Click OK.