Create HW platform (XSA) in Vivado 2023.2

  1. Run Vivado and create Vivado Project:
source /eda/scripts/setup_vivado.sh
PROJ_DIR=${HOME}/my_nas/lab_msw_ex6
  • select Zybo Z7-20 board from Digilent
  • add master Zybo constraints file SDF from Digilent (now it is totally commented out, but it can be useful when you later use the devices that are on Zybo board):
/eda/Xilinx/Vivado/2023.2/data/boards/board_files/Zybo-Z7-Master.xdc
  1. Create block design:
  • add ZYNQ7 Processing system
  • Set master PL clock from 50 to 125MHz (required for Ethernet card): Clock Configuration/PL Fabric clocks/Set FCLK_CLK0
  • add buttons, switches, LEDs, GPIOs etc.
  • if not adding any AXI peripheral, remove M_AXI interface from processor to avoid errors regarding clock: PS-PL Configuration/AXI Non Secure Enablement/GP Master AXI Interface/M AXI GP0 interface = OFF
  • check/add/correct SDC constraints, if needed
  • add HDL wrapper:
  • Sources window/right-click on block diagram/Create HDL Wrapper
  1. Generate bitstream
  1. Export XSA hardware:
  • File/Export/Export HW (include bitstream) File/Export/Export Hardware… + Include bitsream

Your XSA file will be in the Vivado project root folder (i.e. vivado_prj/zybo-z7-20-hw-platform.xsa). Save the XSA file path and name for the next step!

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