Microelectronic Embedded Systems - 2nd sem.

Course prepared by dr. hab. inż. M. Wójcikowski

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Laboratory

• It is required to follow the order of exercises!
• Deadline for passing laboratory exercises: at the last classes planned for the group to which the student belongs.
• Short instructions of FPGA design

• No.	Exercise	Points	Submit by (dealine):	Major-related learning outcome
  Lab 1	Creating hardware platform for freeRTOS and running demo software	2	-	[K7_U03]
  Lab 2	Multi-threaded calculations	8	-	[K7_U03]
  Lab 3	Priority in freeRTOS	4	-	[K7_U03]
  Lab 4	Usage of mutexes	4	-	[K7_U04]
  Lab 5	Usage of semaphores	4	-	[K7_U04]
  Lab 6	Summary exercise	8	-	[K7_U04]