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Flaga PL Polska wersja

HDL Languages

Rules for passing the course:

Lecture (15 hrs/semester):
50 points = 2 tests: test I: 25 points, test II: 25 points
test = 40 questions, duration 15 min., calculation of points:
points_for_test1 = (no_of_correct_answers1 - 10)*25/30
points_for_test2 = (no_of_correct_answers2 - 10)*25/30

Laboratory (30 hrs/semester):
50 points.
Final deadline to complete exercises is on the last lab in the semester for each laboratory group.

Condition necessary for passing the course:
At least 25 points for tests (sum of test I + test II) and at least 25 points for lab.

Thresholds for grades:
>=90 pts ==> grade 5
>=80 pts ==> grade 4,5
>=70 pts ==> grade 4
>=60 pts ==> grade 3,5
>=50 pts ==> grade 3

Lecture

Laboratory

ATTENTION: Files *.v and *.vhd from exercise from 1 to 4 must be sent to:
lab@ue.eti.pg.gda.pl in form "ex_XXX_name1_name2.vhd"

Laboratory exercises:

No.

Exercise

Design entry

Approximate time

Points

Exercise 1 Parity Generator Verilog 2x45 min. 4
Exercise 2 Frequency Divider Verilog 2x45 min. 4
Exercise 3 Port RS-232 Verilog 4x45 min. 8
Exercise 4 Real Time Clock VHDL 6x45 min. 10
Exercise 5 Simple calculator with PS/2 keyboard VHDL 8x45 min. 12
Exercise 6 Testing and implementation of 128-bit AES encryption block VHDL remaining 12

Additional information: